T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 71

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
6 Clock Architecture
6.7 Clock Circuit Operation—Fallback and Failsafe
6.7.2 Clock Failsafe (continued)
6.7.2.1 Failsafe Events (continued)
Table 56. Clock Failsafe State Descriptions
Clock Failsafe
State
FS_1
FS_2
APLL1 REFCLK is forced to
XTAL1-div-4.
FAILSAFE FLAG is asserted.
APLL1 REFCLK is forced to
XTAL1-div-4.
FAILSAFE FLAG is asserted.
(continued)
Description
TO_SECONDARY User issues FAILSAFE_RETURN to
TO_PRIMARY
SECONDARY
PRIMARY
Exit To
Ambassador T8110L H.100/H.110 Switch
(continued)
User issues FAILSAFE_RETURN to
nonfallback state command
(set register 0x00114 bit 0).
fallback state command
(set register 0x00114 bit 1).
User issues FAILSAFE_RETURN to
non-fallback state command
(set register 0x00114 bit 0).
User issues FAILSAFE_RETURN to
fallback state command
(set register 0x00114 bit 1).
Exit Condition
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