AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 623

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.9.7
Name:
Access Type:
Offset:
Reset Value:
• CELSE: Compare Else Status
• CGT: Compare Greater Than Status
• CLT: Compare Lesser Than Status
• BUSY: Busy Status
• READY: Ready Status
• NOCNT: No Contact Status
• PENCNT: Pen Contact Status
• OVRE: Overrun Error Status
• DRDY: Data Ready Status
32099F–11/2010
31
23
15
7
-
-
-
-
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when the corresponding bit in SR has a zero-to-one transition.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when a conversion has completed and new data is available in LCDR.
Interrupt Status Register
CELSE
30
22
14
6
-
-
-
ISR
Read-only
0x18
0x00000000
NOCNT
CGT
29
21
13
5
-
-
PENCNT
CLT
28
20
12
4
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
AT32UC3L016/32/64
OVRE
BUSY
25
17
9
1
-
-
READY
DRDY
24
16
8
0
-
-
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