AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 195

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.5.7.4
13.5.8
13.5.8.1
13.5.8.2
32099F–11/2010
3.3 V Supply Monitor (SM33)
POR33 control
Register protection
Operating modes
gram execution starts in the CPU. If the VREGCR.FCD is one then the calibration will not be
changed during a reset.
VREGCR includes control bits for the Power-On Reset 3.3V (POR33) detector that monitors the
VDDIN voltage. The POR33 is on by default but can be turned off by software to reduce power
consumption. The 3.3V Supply Monitor (SM33) can then be used to monitor the VDDIN power
supply.
Disabling the POR33 is done by writing a zero to the POR33 Enable bit (VREGCR.POR33EN).
Because of internal synchronisation, the POR33 is not immediately enabled or disabled. The
actual state of the POR33 can be read from the POR33 Status bit (VREGCR.POR33STATUS).
The RC32K oscillator must be enabled to disable the POR33. Once the POR33 has been dis-
abled, the RC32K oscillator can be turned off again.
T h e P O R 3 3 r e s e t c a n b e i g n o r e d b y w r i t i n g a o n e i n t h e P O R 3 3 M a s k b i t
(VREGCR.POR33MASK). Because of internal synchronization, the masking is not immediately
effective, so software should wait for the VREGCR.POR33MASK to be read as a one before
assuming masking is effective. To avoid spurious resets, it is mandatory to mask the POR33
reset when enabling or disabling it.
Rev: 1.0.0.0
The 3.3V supply monitor is a specific voltage detector for the VDDIN voltage. It will indicate if the
VDDIN voltage is above the minimum required input voltage for the voltage regulator . The user
can choose to generate either a reset or an interrupt when the VDDIN voltage drops below this
limit. If reset is selected, this will generate a POR reset.
Please refer to Electrical Characteristics for parametric details.
To prevent unexpected writes to SM33 register due to software bugs, write access to this regis-
ter is protected by a locking mechanism. For details please refer to the UNLOCK register
description.
To prevent further modifications by software, the content of the register can be set as read-only
by writing a one to the Set ForeVer bit (SM33.SFV). Once this bit is set, software can not change
the SM33 content until a POR or POR33 reset is applied.
The SM33 is disabled by default and is enabled by writing to the Supply Monitor Control field in
the SM33 control register (SM33.CTRL).
The SM33 can operate in continuous mode or in sampling mode. In sampling mode, the SM33 i
s periodically enabled for a short period of time, just enough to make a a measurement and then
disabled for a longer time to reduce power consumption.
The current state of the SM33 can be checked by reading the ON bit in SM33 (SM33.ON).
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