AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 151
AT32UC3L-EK
Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Specifications of AT32UC3L-EK
Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
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12.3
Figure 12-1. PM Block Diagram
12.4
Table 12-1.
12.5
12.5.1
12.5.2
12.5.3
32099F–11/2010
Name
RESET_N
Block Diagram
I/O Lines Description
Product Dependencies
Interrupt
Clock Implementation
Power Considerations
External Reset Pad
I/O Lines Description
Power-On
The PM interrupt line is connected to one of the internal sources of the interrupt controller. Using
the PM interrupt requires the interrupt controller to be programmed first.
In AT32UC3L, the HSB shares the source clock with the CPU. This means that writing to the
HSBSEL register has no effect. This register will always read the same value as CPUSEL.
The clock for the PM bus interface (CLK_PM) is generated by the Power Manager. This clock is
enabled at reset, and can be disabled in the Power Manager, whoever if disabled it can only be
re-enabled by a reset.
The Shutdown mode is only available for the “3.3V supply mode, with 1.8V regulated I/O
lines“ power configuration.
Detector
Main Clock Sources
Description
Reset
Reset Sources
Interrupts
Clock Generator
Reset Controller
Sleep Controller
Type
Input
Synchronous
AT32UC3L016/32/64
Synchronous
CPU, HSB,
Instruction
Active Level
Low
Resets
clocks
Sleep
PBx
151
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