AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 382

• Manufacturer Part Number: AT32UC3L-EK
• Description: KIT EVAL AVR32 UC3 MCU
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT32UC3L-EK

• Contents: *
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: UC3L
• Kit Contents: Board
• Features: USB / Battery Powered, Board Controller / Bootloader
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Tool Type: Starter Kit
• Cpu Core: AVR 8
• Data Bus Width: 8 bit
• Processor Series: AT32
• Processor To Be Evaluated: AT32UC3L064
• Interface Type: USB, Capacitive Touch
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.6.5.5
Figure 19-20. Header Transmission
32099F–11/2010
Baud Rate
TXRDY
LINIR
LINIR
Clock
Write
TXD
Header Transmission (Master Node Configuration)
ID
13 dominant bits (at 0)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch
Break Field, Synch Field and Identifier Field.
So in Master node configuration, the frame handling starts with the sending of the header.
The header is transmitted as soon as the identifier is written in the LIN Identifier register (LINIR).
At this moment the flag TXRDY falls.
The Break Field, the Synch Field and the Identifier Field are sent automatically one after the
other.
The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the charac-
ter 0x55 and the Identifier corresponds to the character written in the LIN Identifier Register
(LINIR). The Identifier parity bits can be automatically computed and sent (see
19.6.5.8).
The flag TXRDY rises when the identifier character is transferred into the Shift Register of the
transmitter.
Break Field
1 recessive bit
Delimiter
Break
(at 1)
Start
Bit
1
0
Synch Byte = 0x55
1
0
1
0
1
0
Stop
Bit
AT32UC3L016/32/64
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
Stop
Bit
Section
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