AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 330
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AT32UC3L-EK
Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Specifications of AT32UC3L-EK
Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
- Current page: 330 of 858
- Download datasheet (13Mb)
18.6.2
18.6.2.1
18.6.2.2
18.6.2.3
18.6.2.4
32099F–11/2010
Advanced Operation
Peripheral I/O Pin Control
Pull-up Resistor Control
Output Pin Timings
Interrupts
When a GPIO pin is assigned to a peripheral function, i.e. the corresponding bit in GPER is zero,
output and output enable is controlled by the selected peripheral pin. In addition the peripheral
may control some or all of the other GPIO pin functions listed in
ports those features. All pin features not controlled by the selected peripheral is controlled by the
GPIO.
Refer to the Module Configuration section for details regarding implemented GPIO pin functions
and to the Peripheral chapter for details regarding I/O pin function control.
Table 18-1.
Pull-up can be configured for each GPIO pin. Pull-up allows the pin and any connected net to be
pulled up to VDD if the net is not driven.
Pull-up is useful for detecting if a pin is unconnected or if a mechanical button is pressed, for var-
ious communication protocols and to keep unconnected pins from floating.
Pull-up can be enabled and disabled by writing a one and a zero respectively to the correspond-
ing bit in the Pull-up Enable Register (PUER).
Figure 18-3
The same timing applies when performing a ‘set’ or ‘clear’ access, i.e. writing to OVRS or
OVRC. The timing of PVR is also shown.
Figure 18-3. Output Pin Timings
The GPIO can be configured to generate an interrupt when it detects a change on a GPIO pin.
Interrupts on a pin are enabled by writing a one to the corresponding bit in the Interrupt Enable
Function name
Output
Output enable
Pull-up
Write OVR to 1
Write OVR to 0
OVR / I/O Line
CLK_GPIO
PVR
shows the timing of the GPIO pin when writing to the Output Value Register (OVR).
I/O Pin function Control
GPIO mode
OVR
ODER
PUER
PB Access
Peripheral mode
Peripheral
Peripheral
Peripheral if supported, else GPIO
AT32UC3L016/32/64
PB Access
Table
18-1, if the peripheral sup-
330
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