MT41J256M4HX-15E:D TR Micron Technology Inc, MT41J256M4HX-15E:D TR Datasheet - Page 81
![IC DDR3 SDRAM 1GBIT 78FBGA](/photos/7/23/72317/mfg557-60-fbga_sml.jpg)
MT41J256M4HX-15E:D TR
Manufacturer Part Number
MT41J256M4HX-15E:D TR
Description
IC DDR3 SDRAM 1GBIT 78FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Specifications of MT41J256M4HX-15E:D TR
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (256M x 4)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-FBGA
Organization
256Mx4
Density
1Gb
Address Bus
17b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
220mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 54: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter
R
R
R
R
Asynchronous R
(power-down with DLL off)
Asynchronous R
(power-down with DLL off)
ODT HIGH time with WRITE command and BL8
ODT HIGH time without WRITE command or
with WRITE command and BC4
R
R
R
R
First DQS, DQS# rising edge
DQS, DQS# delay
Write leveling setup from rising CK, CK#
crossing to rising DQS, DQS# crossing
Write leveling hold from rising DQS, DQS#
crossing to rising CK, CK# crossing
Write leveling output delay
Write leveling output error
TT
TT
TT
TT
TT,nom
TT(WR)
TT(WR)
TT
synchronous turn-on delay
synchronous turn-off delay
turn-on from ODTL on reference
turn-off from ODTL off reference
dynamic change skew
-to-R
-to-R
-to-R
TT,nom
TT,nom
TT(WR)
TT
TT
change skew
change skew - BC4
change skew - BL8
turn-on delay
turn-off delay
t
ODTLcnw4
ODTLcnw8
ODTLcnw
WLDQSEN
ODTL off
ODTL on
t
Symbol
t
t
WLMRD
AONPD
ODTH8
ODTH4
t
AOFPD
t
t
t
WLOE
t
t
t
AON
WLH
WLO
AOF
ADC
WLS
–400
Min
Write Leveling Timing
325
325
0.3
0.3
40
25
Dynamic ODT Timing
DDR3-800
0
0
ODT Timing
Max
400
0.7
0.7
–
–
–
–
9
2
–300
Min
245
245
0.3
0.3
DDR3-1066
40
25
0
0
MIN = 6; MAX = n/a
MIN = 4; MAX = n/a
MIN = 2; MAX = 8.5
MIN = 2; MAX = 8.5
CWL + AL - 2CK
CWL + AL - 2CK
4CK + ODTL off
6CK + ODTL off
Max
300
0.7
0.7
–
–
–
–
9
2
WL - 2CK
–250
Min
195
195
0.3
0.3
DDR3-1333
40
25
0
0
Max
250
0.7
0.7
–
–
–
–
9
2
–225
Min
165
165
DDR3-1600
0.3
0.3
40
25
0
0
Max
225
0.7
0.7
7.5
2
–
–
–
–
Units Notes
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
ps
ns
ns
ps
ps
ns
ns
23, 38
39, 40
38
40
38
40
39
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