MT41J256M4HX-15E:D TR Micron Technology Inc, MT41J256M4HX-15E:D TR Datasheet - Page 13

• Manufacturer Part Number: MT41J256M4HX-15E:D TR
• Description: IC DDR3 SDRAM 1GBIT 78FBGA
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr

Specifications of MT41J256M4HX-15E:D TR

• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 1G (256M x 4)
• Speed: 667MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 78-FBGA
• Organization: 256Mx4
• Density: 1Gb
• Address Bus: 17b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 220mA
• Pin Count: 78
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General Notes
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
• The functionality and the timing specifications discussed in this data sheet are for the
• Throughout this data sheet, various figures and text refer to DQs as “DQ.” DQ term is
• The terms “DQS” and “CK” found throughout this data sheet are to be interpreted as
• Complete functionality may be described throughout the document; any page or dia-
• Any specific requirement takes precedence over a general statement.
• Any functionality not specifically stated is considered undefined, illegal, and not sup-
• Row addressing is denoted as A[n:0]. For example,1Gb: n = 12 [x16]; 1Gb: n = 13 [x4,
• A x16 device's DQ bus is comprised of two bytes. If only one of the bytes needs to be
DLL enable mode of operation (normal operation).
to be interpreted as any and all DQ collectively, unless specifically stated otherwise.
DQS, DQS# and CK, CK# respectively, unless specifically stated otherwise.
gram may have been simplified to convey a topic and may not be inclusive of all
requirements.
ported, and can result in unknown operation.
x8]; 2Gb: n = 13 [x16] and 2Gb: n = 14 [x4, x8]; . 4Gb: n = 14 [x16] and 4Gb: n = 15 [x4, x8].
used, use the lower byte for data transfers and terminate the upper byte as noted:
– Connect UDQS to ground via 1K* resistor.
– Connect UDQS# to V
– Connect UDM to V
– Connect DQ 8–15 individually to either V
DQ 8–15.
*If ODT is used, 1K resistor should be changed to 4X that of the selected ODT.
DD
DD
via 1K* resistor.
via 1K* resistor.
13
Micron Technology, Inc. reserves the right to change products or specifications without notice.
SS
1Gb: x4, x8, x16 DDR3 SDRAM
, V
DD
, or V
Functional Description
REF
via 1K resistors,* or float
© 2006 Micron Technology, Inc. All rights reserved.