HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 7
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HI-6120
Manufacturer Part Number
HI-6120
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-6120.pdf
(157 pages)
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HI-6120, HI-6121
List of Figures
Figure 1. HI-6120 / HI-6121 Block Diagram................................................................................. 10
Figure 2. Address Mapping for Registers and RAM .................................................................... 19
Figure 3. MIL-STD-1553 Command Word Structure ................................................................... 46
Figure 4. Deriving the Illegalization Table Address From the Received Command Word ........... 49
Figure 5. Fixed Address Mapping for Illegalization Table ........................................................... 50
Figure 6. Summary of Illegalization Table Addresses for Mode Code Commands ...................... 51
Figure 7. Fixed Address Mapping for Interrupt Log Buffer .......................................................... 54
Figure 8. Address Mapping for Descriptor Table ......................................................................... 56
Figure 9. Deriving a Descriptor Table Control Word Address From Command Word ................. 57
Figure 10. Illustration of Ping-Pong Buffer Mode ........................................................................ 79
Figure 11. Ping-Pong Buffer Mode Example for a Receive Subaddress .................................... 81
Figure 12. Illustration of Indexed Buffer Mode ............................................................................ 84
Figure 13. Indexed Buffer Mode Example for a Receive Subaddress (broadcast not enabled) . 85
Figure 14. Illustration of Circular Buffer Mode 1 .......................................................................... 88
Figure 15. Circular Buffer Mode 1 Example for a Receive Subaddress ..................................... 89
Figure 16. Illustration of Circular Buffer Mode 2 .......................................................................... 93
Figure 17. Circular Buffer Mode 2 Example for a Receive Subaddress ..................................... 94
Figure 18. Generalized Single-Byte Transfer Using SPI Protocol. SCK is Shown for SPI
Modes 0 and 3 ........................................................................................................................... 108
Figure 19. Single-Word (2-Byte) Read From RAM or a Register ...............................................110
Figure 20. Single-Word (2-Byte) Write To RAM or a Register ....................................................110
Figure 21. HI-6121 Host Bus Interface Timing Diagram ............................................................ 146
Figure 22. Register and RAM Write Operations for BTYPE = 1 ................................................ 147
Figure 23. Register and RAM Write Operations for BTYPE = 0 ................................................ 148
Figure 24. Register and RAM Read Operations for BTYPE = 1 ................................................ 149
Figure 25. Register and RAM Read Operations for BTYPE = 0 ................................................ 150
HOLT INTEGRATED CIRCUITS
7
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