HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 23

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

Bit No.
4
3
2
1
0
Mnemonic R/W
BCSTINV
UMCINV
NOTICE2
SMCP
SSRD8
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
Function
Broadcast Commands Invalid.
If this bit is high, commands addressed to RT address 31 are treated as
invalid: There is no terminal recognition of commands to RT address 31;
there is no RT command response, and no status updating for the benefit
of following “transmit status” or “transmit last command” mode commands.
If this bit is low, commands addressed to RT address 31 are treated as
valid broadcast commands.
Undefined Mode Codes Invalid.
This bit globally defines whether undefined mode code commands are
treated as valid (default) or invalid commands. This bit applies only to the
following undefined mode code commands:
If this bit is low (default state after MR pin reset) undefined mode code
commands are considered valid, and RT response is based on individual
mode command settings in the Illegalization Table: If a mode command is
legal, the RT “responds in form” and updates status. If a mode command
is illegal, the RT asserts Message Error status and (if non-broadcast)
transmits only its Status Word without associated data word. Later in this
data sheet, the section “RT Message Responses, Options & Exceptions”
fully describes terminal response for each mode code value, command
word T/R bit state, and option settings.
If this bit is high, undefined mode code commands are treated as invalid:
There is no RT recognition of an invalid command, no RT command
response, and no status updating for the benefit of following “transmit
status” or “transmit last command” mode commands.
If this bit is high, the terminal stores data associated with broadcast com-
mands separately from data associated with non-broadcast commands
to meet the requirements of MIL-STD-1553B Notice 2. If this bit is low,
broadcast command data is stored in the same buffer as non-broadcast
command data.
Simplified Mode Command Processing.
When asserted, the device applies simplified processing for all valid mode
code commands. The later section entitled “Mode Command Processing”
describes this option.
Single-Strobe Read for 8-Bit Parallel Bus Mode.
This bit only applies to HI-6120 (not HI-6121) and only applies when the
parallel host bus is configured for 8-bit bus width. When performing 2-byte
read accesses of external memory, some microprocessors with 8-bit bus
assert individual Read Enable (or STROBE) pulses for high and low bytes.
Other microprocessors assert a single, wider Read Enable (or STROBE)
pulse, while simply changing the low address bit (A0 / LB) to access the
two bytes. For this last case, the SSRD8 bit should be set when writing
device configuration, before register or RAM readback is performed.
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
Mode Codes 17, 20 and 21 with T/R bit = 1
23
Mode Codes 0 through 15 with T/R bit = 0
Mode Codes16, 18 and19 withT/R bit = 0