HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 18

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

4. MEMORY AND REGISTER
The HI-6120 and HI-6121 have an internal address
space of 32K 16-bit words. All memory addresses in
this data sheet are expressed as hexadecimal numbers,
using the C programming convention where the prefix
“0x” denotes a hexadecimal value; e.g., 0x00FF repre-
sents 00FF hex.
All device RAM and register address mapping is word
oriented, rather than byte oriented. Register and mem-
ory addresses throughout this document reflect word
addressing. For all HI-6121 and most HI-6120 applica-
tions, word oriented addressing applies. Word oriented
addressing with the HI-6120 uses address inputs A15 to
A1; address input A0 is not used as fifteen bits are suf-
ficient for a 32K address range.
HI-6120 ONLY: When required by the application, the
host bus interface HI-6120 is able to use byte transfers.
All 8-bit microprocessors (and some 16-bit and 32-bit mi-
croprocessors) use (or can use) byte-oriented memory
accesses. To provide byte capability, the HI-6120 has a
sixteenth bus address input, A0. Byte oriented address-
ing with the HI-6120 uses all 16 address pins, A15:A0 to
address 64K bytes. The A0 input denotes whether the
first or second byte in the word is being addressed, while
ADDRESSING
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
18
A15:A1 indicate the word address. This difference must
be considered when assigning HI-6120 pointer values
or accessing RAM or registers. From the microproces-
sor’s standpoint, any host-assigned RAM buffer address
will be double the value of the buffer’s pointer stored
in RAM. This paragraph only applies to HI-6120 us-
ing 8-bit bus width. From this point on, all register and
memory addresses presented in this data sheet are 15-
bit word addresses.
From the host standpoint, register operations and RAM
operations are performed identically. Registers occupy
the lowest 32 addresses, 0x0 to 0x001F. Depending on
function, individual registers may be read-only, read-
write, or a combination of read-only and read-write bit
fields. Read-only registers, and read-only bit fields con-
tained in registers, are protected against accidental host
overwrite by device logic.
Addresses in the range 0x0020 to 0x7FFF apply to static
RAM memory. All RAM is read-write and can be written
or read by either the host or the internal device logic.
Some memory locations (specifically Descriptor Table
Control Words) contain bits updated by both host and
device. These locations are protected against accidental
data collision by device arbitration logic which acts when
concurrent writes by both host and device occur.