HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 12
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HI-6120
Manufacturer Part Number
HI-6120
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-6120.pdf
(157 pages)
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BUSA, BUSA
BUSB, BUSB
VCC, VCCP
TEST7:0
ACTIVE
READY
SSYSF
TTCLK
MODE
COMP
MCLK
ESCK
MISO
MOSI
TEST
GND
ECS
Pin
Function
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
ANALOG
ANALOG
POWER
POWER
INPUT
INPUT
INPUT
INPUT
INPUT
BI-DIR
INPUT
INPUT
Description
Pin is low when auto-initialization or built-in test is in-process. The host must not
access shared RAM or device registers when pin state is low. When output
is high, the shared RAM and registers may be configured, and device will begin
terminal execution when the STEX (start execution) bit in Configuration Register 1
is set.
Pin is high when the HI-6120 / HI-6121 is actively processing a valid MIL-
STD-1553 command, otherwise low. The falling edge signifies message comple-
tion.
Master clock input, 50.0 MHz ±0.01% (100ppm). Internal 50KΩ pull-down resistor.
Time-Tag Clock input. Internal 50KΩ pull-down resistor. When Configuration Reg-
ister 1 bits TTCK2:0 = 001, this pin is the clock input for the Time Tag counter. For
other values of TTCK2:0, the Time-Tag counter is internally clocked so the TTCLK
pin is not used.
Subsystem fail input, active high. Internal 50KΩ pull-down resistor. When this
input is high, the HI-6120 / HI-6121 terminal sets the SUBSYS flag in its status
word.
Chip select output for the dedicated Serial Peripheral Interface (SPI) that con-
nects to the optional external serial EEPROM used for automatic self-initialization.
For this auto-initialization SPI, the device operates in SPI master mode while the
external memory operates in slave mode. This SPI is separate from the host SPI
found in the HI-6121.
Serial Clock output signal for the dedicated auto-initialization SPI connected to
external auto-initialization EEPROM.
Serial Input signal (Master-In Slave-Out) for the dedicated auto-initialization SPI
connected to external auto-initialization EEPROM. Internal 50KΩ pull-down resis-
tor.
Serial Output signal (Master-Out Slave-In) for the dedicated auto-initialization SPI
connected to external auto-initialization EEPROM.
Bi-directional analog interface to MIL-STD-1553 bus A isolation transformer, posi-
tive and negative signals respectively.
Bi-directional analog interface to MIL-STD-1553 bus B isolation transformer, posi-
tive and negative signals respectively.
3.3V supply voltage inputs for logic and transceiver circuits.
Ground pin for logic and transceiver circuits.
Test enable. Internal 50KΩ pull-down resistor. The host asserts this pin to per-
form RAM self-test or loopback tests.
Test pins used for factory testing. Internal 50KΩ pull-down resistor. Do not con-
nect these pins.
Test pin used for factory testing. Internal 50KΩ pull-up resistor. Do not connect
this pin.
Test pin used for factory testing. Internal 50KΩ pull-down resistor. Do not con-
nect this pin.
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
12
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