HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 11

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

2. PIN DESCRIPTIONS
MTSTOFF
EECOPY
AUTOEN
INTMES
TXINHA
TXINHB
INTHW
RTA4:0
LOCK
EE1K
RTAP
Pin
MR
Function
OUTPUT
OUTPUT
INPUTS
INPUTS
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
Table 1. Pin Descriptions (Both HI-6120 and HI-6121)
Description
Hardware Interrupt output, active low.This signal is programmed as a brief low-
going pulse output, or as a level output by the INTSEL bit in Configuration Regis-
ter 1.
Message Interrupt output, active low. This signal is programmed as a brief low-go-
ing pulse output, or as a level output by the INTSEL bit in Configuration Register
1.
Master Reset, active low. Internal 50KΩ pull-up resistor. The host can also assert
software reset by setting the SRST bit in Configuration Register 1.
Memory test disable, active high. Internal 50KΩ pull-down resistor. When this pin
is low, the device performs a memory test on the entire RAM after rising edge on
the MR reset pin. When this pin is high, the RAM test is skipped, resulting in a
faster reset process. For further information, refer to Section 14 on page 101.
EEPROM Copy, active high. Internal 50KΩ pull-down resistor. This input is used to
start the process that copies registers and configuration tables to serial EEPROM.
Refer to Section 14 on page 101.
Auto-Initialize Enable, active high. Internal 50KΩ pull-down resistor. If this pin is
high at rising edge on MR reset input, automatic initialization proceeds, copying
configuration data to registers and RAM from an external serial EEPROM via the
dedicated auto-initialization SPl port. Refer to Section 14 on page 101.
When the AUTOEN pin is high, the EE1K input sets the range of the auto-initial-
ization process. When EE1K is low, registers and RAM occupying the 32K ad-
dress range from 0x0 to 0x7FFF are initialized. For applications needing faster
initialization, when EE1K is high, only registers and RAM occupying the 1K
address range from 0x0 to 0x03FF are initialized. This pin has an internal 50KΩ
pull-down resistor. If the AUTOEN pin is low, this pin is not used. Refer to Section
14 on page 101.
Remote terminal address bits 4 - 0, and parity bit. Internal 50KΩ pull-up resistors.
The RTAP pin should provide odd parity for the address present on pins RTA4:0.
Terminal address and parity pin levels are latched into the Operational Status
register when rising edge occurs on the MR pin. The Operational Status Register
value (not these pins) reflects the active terminal address. The register value can
be overwritten by the host under some circumstances. See section 5.3 on page 28.
Internal 50KΩ pull-down resistor. Pin state is latched into the Operational Status
register LOCK bit when rising edge occurs on the MR pin. If Operational Status
register LOCK bit is high, terminal address in the register cannot be overwritten by
a host register write. If Operational Status register LOCK bit is low, the host can
overwrite the five terminal address bits and address parity bit in the Operational
Status register.
Transmit Inhibits for Bus A and Bus B, active high. Internal 50KΩ pull-down
resistors. These inputs are logically ORed with the corresponding TXINHA and
TXINHB bits in Configuration Register 1. If the input pin or register bit is high, bus
transmit is disabled.
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
11