HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 43
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HI-6120
Manufacturer Part Number
HI-6120
Description
MIL-STD-1553 Remote Terminal ICs
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
1.HI-6120.pdf
(157 pages)
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13,12,11 RBSEL2:0
Bit No.
10
Mnemonic
(continued)
RBSTRT
R/W Reset Function
R/W
R/W
0
0
Description of the RAM BIST “PATTERN” test selected when register
bits
RBSEL2:0 = 001:
Note: Test read /write accesses to addresses 0x0000 - 0x001F involve 32
RAM locations not accessible to the host. These accesses do not affect the
host-accessible registers, overlaying the same address range.
1. Write 0x0000 to all RAM locations, 0x0000 through 0x7FFF.
2. Repeat the following sequence for each RAM location from 0x00000
3. Write 0xFFFF to all RAM locations, 0x0000 through 0x7FFF
4. Repeat the following sequence for each RAM location from 0x00000
5. Write each cell’s memory address into each RAM location from 0x00020
6. Read each memory location from 0x00000 to 0x7FFF and verify it con-
7. Write 1s complement of each cell’s memory address, into each RAM
8. Read each memory location and verify it contains the 1s complement of
RAM BIST Start.
Writing logic 1 to this bit initiates the RAM BIST test selected by register
bits RBSEL2:0. The RBSTRT bit can only be set if the TEST input pin
is high and if register bit 15 is already asserted. This bit is automatically
cleared upon test completion. Register bits 9-8 indicate pass / fail test
result.
HOLT INTEGRATED CIRCUITS
a.
b.
c.
d.
e.
f.
g.
h.
i.
j.
a.
b.
c.
d.
e.
f.
g.
h.
i.
j.
through 0x7FFF:
through 0x7FFF:
to 0x7FFF.
tains its address.
location (same addr range).
its address.
HI-6120, HI-6121
Read and verify 0x0000
Write then read and verify 0x5555
Write then read and verify 0xAAAA
Write then read and verify 0x3333
Write then read and verify 0xCCCC
Write then read and verify 0x0F0F
Write then read and verify 0xF0F0
Write then read and verify 0x00FF
Write then read and verify 0xFF00
Write 0x0000 then increment RAM address and go to step (a)
Read and verify 0xFFFF
Write then read and verify 0x5555
Write then read and verify 0xAAAA
Write then read and verify 0x3333
Write then read and verify 0xCCCC
Write then read and verify 0x0F0F
Write then read and verify 0xF0F0
Write then read and verify 0x00FF
Write then read and verify 0xFF00
Write 0xFFFFthen increment RAM address and go to step (a)
43
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