HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 33

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

5.8.
This 16-bit register is Read-Write and is fully maintained by the host. All bits are active high. Bits set in this register are
reflected in the outgoing MIL-STD-1553 status word.
The”dynamic bus control acceptance” bit is not implemented; this device cannot function as bus controller. The host
controls the Instrumentation, Busy, Terminal Flag, Service Request and Subsystem Flag status word bits by writing to
bits 9:0 in this register. Remote terminal status word responses reflects the assertion of these register bits until negated
by the host, unless the Immediate Clear function (bit 15) is enabled. The position of register bits 4 and 10 correspond
to the Broadcast Command Received (BCR) and Message Error (ME) bits in the terminal status word. Transmit state
for the BCR and ME bits in the terminal’s status word is controlled by the device, based on prior command transac-
tions. This pair of register bits cannot be set by a host write operation and always read back logic 0, so do not reflect
the true status of these status flags.
NOTE: ‘Reset’ refers to bit value following either Master Reset (MR) or software reset.
Bit No. Mnemonic R/W Reset Function
Bit No. Mnemonic
14-10
MSB
7-4
15
0
9
8
15 14 13 12 11 10 9
1553 Status Word Bits Register (0x0007)
RAMIF
TXANDCLR R/W
-----
INST
SVCREQ
-----
0
0
0
0
0
R
R/W
R/W
R/W
R
R
8
0
Reset
0
7
0
0
0
0
0
0
6
RAM Initialization Fail Interrupt.
This bit is asserted after auto-initialization if an initialized RAM location does
not match its 2 corresponding serial EEPROM locations. Because the RAMIF
bit is always set in the Interrupt Enable register, the INTHW output is asserted
and the Interrupt Log is updated.
0
5
Function
Transmit (Once) and Clear.
When this bit is set, the register is cleared after any set bits 0-9 are used
once in a transmitted status word. This bit does not affect operation of the
Transmit Status Word and Transmit Last Command mode codes. Example:
Transaction of a valid legal command with the INST and TXANDCLR bits
asserted results in status word transmission with the Instrumentation bit
set. If the following command is Transmit Status or Transmit Last Com-
mand mode code, the Instrumentation bit remains set.
Not used, these bits cannot be set.
Instrumentation.
When this bit is asserted, the Instrumentation status bit is set.
Service Request.
When this bit is asserted, the Service Request status bit is set.
Not used, these bits cannot be set.
HOLT INTEGRATED CIRCUITS
0
4
HI-6120, HI-6121
3
2
0
1
0
33
LSB
* STATUS BIT AUTOMATICALLY
CONTROLLED BY DEVICE