HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 25

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

Bit No.
11
10
9
Mnemonic
RTTAG
ALTBITW
MCOPT4
R/W Reset Function
R/W
R/W
R/W
0
0
0
Reset Time-Tag Counter.
Assertion of this bit clears the Time-Tag counter and counting is disabled until
the bit is negated. Also the “synchronize” mode command (MC1) causes
automatic Time-Tag counter reset.
Alternate BIT Word Enable.
If this bit is logic 0, the device responds to a “transmit BIT word” mode com-
mand (MC19) by sending the word stored in the Built-In Test Word register,
at address 0x0014. If this bit is logic 1, the terminal transmits the word stored
in the Alternate Built-In Test Word register, at address 0x0015. The alternate
register allows the user to fully define the BIT word, while the default register
location contains several predefined, device-controlled status bits.
Mode Code Option 4.
Note: Mode commands MC4 and MC5 are not affected by the MCOPT4 bit,
but are included in this description to present a complete picture of device
response to bus shutdown mode commands.
The Bus Controller exercises “shutdown“ control over the terminal’s con-
nection to the inactive MIL-STD-1553 bus using the “transmitter shutdown”
(MC4) or “selected transmitter shutdown” (MC20 decimal) mode code
commands. When the inactive transmitter is shutdown, the HI-612x device
inhibits further transmission on that bus. Once shutdown, the transmitter can
be reactivated by (a) an “override transmitter shutdown” (MC5) mode com-
mand, (b) an “override selected transmitter shutdown” (MC21 decimal) mode
command, (c) a “reset remote terminal” (MC8) mode command, (d) hardware
MR master reset or (e) software reset by setting the SRST bit in Configura-
tion Register 1.
When the MCOPT4 bit is reset, the device automatically performs bus shut-
down and shutdown override in response to mode commands. When the
MCOPT4 bit is set, the device only transmits status; the host must perform
bus shutdown and override duties by asserting control of the TXINHA and
TXINHB bits in Configuration Register 1, or by controlling the input pins with
the same function.
Mode commands MC4 (”transmitter shutdown”) and MC5 (”override trans-
mitter shutdown”) have unconditional shutdown or override response. When
MC4 is received, the terminal fulfills shutdown for the inactive bus, disabling
the transmitter and receiver, or transmitter only, depending on the state of the
SDSEL bit in Configuration Register 1. The device affirms shutdown status by
updating bits 15-12 in the BIT Word Register. When mode command MC5 is
received, inactive bus transmit and receive is automatically reenabled by the
device; “shutdown override” status is affirmed by resetting the inactive bus
shutdown bit(s) in the BIT Word Register.
HOLT INTEGRATED CIRCUITS
HI-6120, HI-6121
25