HI-6120 HOLTIC [Holt Integrated Circuits], HI-6120 Datasheet - Page 21

• Manufacturer Part Number: HI-6120
• Description: MIL-STD-1553 Remote Terminal ICs
• Manufacturer: HOLTIC [Holt Integrated Circuits]

5.1.
This 16-bit register is Read-Write and is fully maintained by the host. All bits are active high.
NOTE: ‘Reset’ refers to bit value following Master Reset (MR). The bit value following software reset is un-
changed unless specifically indicated by an “SR” value.
MSB
Bit No.
15
14
13
15 14 13 12 11 10 9
Configuration Register 1 (0x0000)
Mnemonic R/W
INHBUSA R/W
INHBUSB R/W
INTSEL
R/W
8
Reset
7
0
0
0
X
6
X
5
Function
Bus A Inhibit.
When set, this bit disables transmit and receive for Bus A. This bit is
logically ORed with the TXINHA input signal to control Bus A transmitter
enablement. Bus A transmission is disabled if the INHBUSA register bit or
TXINHA input pin is asserted. The TXINHA pin does not affect the Bus A
receiver.
Bus B Inhibit.
When set, this bit disables transmit and receive for Bus B. This bit is
logically ORed with the TXINHB input signal to control Bus B transmitter
enablement. Bus B transmission is disabled if the INHBUSB register bit or
TXINHB input pin is asserted. The TXINHB pin does not affect the Bus B
receiver.
Interrupt Mode Select.
When this bit is low, pulse interrupt outputs are selected for INTMES and
INTHW output pins. When this bit is high, level interrupts are enabled
which require host acknowledgment for interrupt pin reset.
HOLT INTEGRATED CIRCUITS
4
HI-6120, HI-6121
3
2
1
0
21
LSB