HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 963

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

21.8
Output of the φ clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the φ clock stops at the end of the bus cycle,
and φ output goes high. φ clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, φ clock output is disabled and input port mode is set.
Table 21.5 shows the state of the φ pin in each processing state.
Table 21.5 φ Pin State in Each Processing State
DDR
PSTOP
Hardware standby mode
Software standby mode
Sleep mode
Normal operating state
Oscillator
RES
STBY
φ Clock Output Disabling Function
Figure 21.3 Hardware Standby Mode Timing
0
—
High impedance
High impedance
High impedance
High impedance
Rev.6.00 Sep. 27, 2007 Page 933 of 1268
1
0
Fixed high
φ output
φ output
stabilization
Oscillation
Section 21 Power-Down Modes
time
1
Fixed high
Fixed high
REJ09B0220-0600
exception
handling
Reset