HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 426

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 I/O Ports
Port A Data Register (PADR)
PADR is an 8-bit readable/writable register that stores output data for the port A pins (PA
PA
PADR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port A Register (PORTA)
Note: * Determined by state of pins PA
PORTA is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port A pins (PA
If a port A read is performed while PADDR bits are set to 1, the PADR values are read. If a port A
read is performed while PADDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTA contents are determined by the pin states, as
PADDR and PADR are initialized. PORTA retains its prior state in software standby mode.
Rev.6.00 Sep. 27, 2007 Page 396 of 1268
REJ09B0220-0600
Bit
Initial value :
R/W
Bit
Initial value :
R/W
0
).
:
:
:
:
PA7DR
R/W
PA7
— *
R
7
0
7
PA6DR
R/W
PA6
— *
R
6
0
6
7
to PA
PA5DR
7
R/W
to PA
PA5
— *
R
5
0
5
0
) must always be performed on PADR.
0
.
PA4DR
R/W
PA4
— *
R
4
0
4
PA3DR
R/W
PA3
— *
R
3
0
3
PA2DR
R/W
PA2
— *
R
2
0
2
PA1DR
R/W
PA1
— *
R
1
0
1
7
PA0DR
to
R/W
PA0
— *
R
0
0
0