HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 895
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Bit 0—Program 2 (P2): Selects program mode transition or clearing for H'040000 to H'07FFFF.
Do not set the SWE2, PSU2, ESU2, EV2, PV2, or E2 bit at the same time.
Bit 0
P2
0
1
19.23.3 Erase Block Register 1 (EBR1)
EBR1 is an 8-bit register that specifies the flash memory erase area block by block. EBR1 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, when a low
level is being input to the FWE pin, and when the SWE1 bit in FLMCR1 is not set when a high
level is being input to the FWE pin. When a bit in EBR1 is set, the corresponding block can be
erased. Other blocks are erase-protected. Set only one bit in EBR1 and EBR2 together (setting
more than one bit will automatically clear all EBR1 and EBR2 bits to 0). When on-chip flash
memory is disabled, a read will return H'00 and writes are invalid.
The flash memory block configuration is shown in table 19.49
Bit
EBR1
Initial value :
R/W
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE2 = 1, and PSU2 = 1
:
:
R/W
EB7
7
0
R/W
EB6
6
0
R/W
EB5
5
0
EB4
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 865 of 1268
R/W
EB3
3
0
R/W
EB2
2
0
REJ09B0220-0600
Section 19 ROM
R/W
EB1
1
0
(Initial value)
EB0
R/W
0
0
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