HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 307

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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ETCRB is decremented by 1 after every block transfer, and when the count reaches H'0000 the
DTE bit is cleared and transfer ends. If the DTIE bit is set to 1 at this point, an interrupt request is
sent to the CPU or DTC.
Figure 7.15 shows the operation flow in block transfer mode.
Figure 7.15 Operation Flow in Block Transfer Mode
MARB = MARB – DAIDE · (–1)
MARA = MARA – SAIDE · (–1)
MARA = MARA + SAIDE · (–1)
MARB = MARB + DAIDE · (–1)
Write to address specified by MARB
No
Read address specified by MARA
Section 7 DMA Controller (Not Supported in the H8S/2321)
ETCRAL = ETCRAL – 1
ETCRB = ETCRB – 1
ETCRAL = ETCRAH
(DTE = DTME = 1)
Clear DTE bit to 0
Transfer request?
ETCRB = H'0000
ETCRAL = H'00
to end transfer
Release bus
Acquire bus
BLKDIR = 0
Start
Yes
Yes
Yes
Yes
DAID
SAID
Rev.6.00 Sep. 27, 2007 Page 277 of 1268
· 2
· 2
SAID
DAID
DTSZ
DTSZ
· 2
· 2
· ETCRAH
· ETCRAH
DTSZ
DTSZ
No
No
No
REJ09B0220-0600

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