HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 363
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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8.3.7
In block transfer mode, one operation transfers one block of data. Either the transfer source or the
transfer destination is designated as a block area.
The block size is 1 to 256. When the transfer of one block ends, the initial state of the block size
counter and the address register specified as the block area is restored. The other address register
is then incremented, decremented, or left fixed.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt is requested.
Table 8.8 lists the register information in block transfer mode and figure 8.8 shows the memory
map in block transfer mode.
Table 8.8
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Block Transfer Mode
Register Information in Block Transfer Mode
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Rev.6.00 Sep. 27, 2007 Page 333 of 1268
Function
Designates transfer source address
Designates destination address
Holds block size
Block size counter
Transfer counter
Section 8 Data Transfer Controller
REJ09B0220-0600
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