HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 27

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

19.23 Register Descriptions ........................................................................................................ 859
19.24 On-Board Programming Modes........................................................................................ 870
19.25 Programming/Erasing Flash Memory ............................................................................... 878
19.26 Flash Memory Protection.................................................................................................. 884
19.27 Flash Memory Emulation in RAM ................................................................................... 887
19.28 Interrupt Handling when Programming/Erasing Flash Memory....................................... 889
19.29 Flash Memory PROM Mode............................................................................................. 890
19.30 Flash Memory Programming and Erasing Precautions ..................................................... 906
19.23.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 859
19.23.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 862
19.23.3 Erase Block Register 1 (EBR1) ........................................................................... 865
19.23.4 Erase Block Registers 2 (EBR2) .......................................................................... 866
19.23.5 System Control Register 2 (SYSCR2) ................................................................. 867
19.23.6 RAM Emulation Register (RAMER)................................................................... 868
19.24.1 Boot Mode ........................................................................................................... 870
19.24.2 User Program Mode............................................................................................. 876
19.25.1 Program Mode (n = 1 for addresses H'000000 to H'03FFFF
19.25.2 Program-Verify Mode (n = 1 for addresses H'000000 to H'03FFFF and
19.25.3 Erase Mode (n = 1 for addresses H'000000 to H'03FFFF
19.25.4 Erase-Verify Mode (n = 1 for addresses H'000000 to H'03FFFF and
19.26.1 Hardware Protection ............................................................................................ 884
19.26.2 Software Protection.............................................................................................. 884
19.26.3 Error Protection.................................................................................................... 885
19.27.1 Emulation in RAM............................................................................................... 887
19.27.2 RAM Overlap ...................................................................................................... 888
19.29.1 PROM Mode Setting............................................................................................ 890
19.29.2 Socket Adapters and Memory Map...................................................................... 891
19.29.3 PROM Mode Operation....................................................................................... 893
19.29.4 Memory Read Mode ............................................................................................ 894
19.29.5 Auto-Program Mode ............................................................................................ 898
19.29.6 Auto-Erase Mode ................................................................................................. 900
19.29.7 Status Read Mode ................................................................................................ 902
19.29.8 Status Polling ....................................................................................................... 904
19.29.9 PROM Mode Transition Time ............................................................................. 904
19.29.10 Notes on Memory Programming........................................................................ 905
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 878
n = 2 for addresses H'040000 to H'07FFFF) ........................................................ 879
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 881
n = 2 for addresses H'040000 to H'07FFFF) ........................................................ 882
Rev.6.00 Sep. 27, 2007 Page xxvii of xxx
REJ09B0220-0600