HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 267

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.3
Full address mode transfer is performed with channels A and B together. For details of full address
mode setting, see table 7.4.
7.3.1
MAR is a 32-bit readable/writable register; MARA functions as the transfer source address
register, and MARB as the destination address register.
MAR is composed of two 16-bit registers, MARH and MARL. The upper 8 bits of MARH are
reserved: they are always read as 0, and cannot be modified.
MAR is incremented or decremented each time a byte or word transfer is executed, so that the
source or destination memory address can be updated automatically. For details, see section 7.3.4,
DMA Control Register (DMACR).
MAR is not initialized by a reset or in standby mode.
7.3.2
IOAR is not used in full address transfer.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Register Descriptions (2) (Full Address Mode)
Memory Address Register (MAR)
I/O Address Register (IOAR)
:
:
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
31
15
—
—
0
*
30
14
—
—
0
*
29
13
—
—
0
*
28
12
—
—
0
*
27
11
—
—
0
Section 7 DMA Controller (Not Supported in the H8S/2321)
*
26
10
—
—
0
*
25
—
—
0
9
*
24
—
— R/W R/W R/W R/W R/W R/W R/W R/W
0
8
*
Rev.6.00 Sep. 27, 2007 Page 237 of 1268
23
*
7
*
22
6
*
*
21
5
*
*
20
4
*
*
19
REJ09B0220-0600
3
*
*
18
*
2
*
*: Undefined
17
1
*
*
16
0
*
*