HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 736
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Section 16 A/D Converter (8 Analog Input Channel Version)
16.2.2
Note: * Only 0 can be written to bit 7, to clear this flag.
ADCSR is an 8-bit readable/writable register that controls A/D conversion operations and shows
the status of the operation.
ADCSR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Bit 7—A/D End Flag (ADF): Status flag that indicates the end of A/D conversion.
Bit 7
ADF
0
1
Note: * The DMAC is not supported in the H8S/2321.
Bit 6—A/D Interrupt Enable (ADIE): Selects enabling or disabling of interrupt (ADI) requests
at the end of A/D conversion.
Bit 6
ADIE
0
1
Rev.6.00 Sep. 27, 2007 Page 706 of 1268
REJ09B0220-0600
Bit
Initial value :
R/W
A/D Control/Status Register (ADCSR)
Description
[Clearing conditions]
•
•
[Setting conditions]
•
•
Description
A/D conversion end interrupt (ADI) request disabled
A/D conversion end interrupt (ADI) request enabled
:
:
When 0 is written to the ADF flag after reading ADF = 1
When the DMAC * or DTC is activated by an ADI interrupt and ADDR is read
Single mode: When A/D conversion ends
Scan mode:
R/(W) *
ADF
7
0
ADIE
R/W
When A/D conversion ends on all specified channels
6
0
ADST
R/W
5
0
SCAN
R/W
4
0
CKS
R/W
3
0
CH2
R/W
2
0
CH1
R/W
1
0
(Initial value)
(Initial value)
CH0
R/W
0
0
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