HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 1127
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HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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TSR5—Timer Status Register 5
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
—
—
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
R/(W)*
Overflow Flag
TCFV
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
—
—
3
0
—
—
2
0
Input Capture/Output Compare Flag B
R/(W)*
TGFB
Rev.6.00 Sep. 27, 2007 Page 1097 of 1268
H'FEA5
0
1
1
0
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
Input Capture/Output Compare Flag A
Note: 1. The DMAC is not supported in the H8S/2321.
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
0
1
R/(W)*
TGFA
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
DISEL bit of MRB in DTC is 0
DTA bit of DMABCR in DMAC*
Appendix B Internal I/O Registers
as output compare register
input capture signal while TGRA is functioning
as input capture register
REJ09B0220-0600
1
is 1
TPU5
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