HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 1221

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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TCSR—Timer Control/Status Register
Bit
Initial value
Read/Write *
Notes: 1. The method for writing to TCSR is different from that for general registers to prevent
2. Can only be written with 0 for flag clearing.
1
accidental overwriting. For details, see section 13.2.4, Notes on Register Access.
:
:
:
R/(W) *
Overflow Flag
OVF
7
0
0
1
Timer Mode Select
Notes: 1. The WDTOVF pin function is not available in the F-ZTAT versions.
0
1
2
[Clearing condition]
When 0 is written to OVF after reading OVF = 1
[Setting condition]
When TCNT overflows from H'FF to H'00 in interval timer mode
WT/IT
Interval timer mode: Sends the CPU an interval timer interrupt
request (WOVI) when TCNT overflows
Watchdog timer mode: Generates the WDTOVF signal *
TCNT overflows *
R/W
2. For details of the case where TCNT overflows in watchdog timer
6
0
Timer Enable
mode, see section 13.2.3, Reset Control/Status Register (RSTCSR).
0
1
Note: * The overflow period is the time from when TCNT
TME
TCNT is initialized to H'00 and halted
TCNT counts
Clock Select
R/W
CKS2 CKS1 CKS0
5
0
0
1
2
starts counting up from H'00 until overflow occurs.
0
1
0
1
4
1
0
1
0
1
0
1
0
1
Rev.6.00 Sep. 27, 2007 Page 1191 of 1268
H'FFBC (W), H'FFBC (R)
3
1
φ/2 (Initial value)
φ/64
φ/128
φ/512
φ/2048
φ/8192
φ/32768
φ/131072
Clock
Appendix B Internal I/O Registers
CKS2
R/W
2
0
CKS1
(when φ = 20 MHz)
R/W
25.6 µs
819.2 µs
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68 s
Overflow period*
1
0
REJ09B0220-0600
1
when
CKS0
R/W
0
0
WDT

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