HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 686
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HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Section 14 Serial Communication Interface (SCI)
14.4
SCI Interrupts
The SCI has four interrupt sources: the transmit-end interrupt (TEI) request, receive-error interrupt
(ERI) request, receive-data-full interrupt (RXI) request, and transmit-data-empty interrupt (TXI)
request. Table 14.12 shows the interrupt sources and their relative priorities. Individual interrupt
sources can be enabled or disabled with the TIE, RIE, and TEIE bits in the SCR. Each kind of
interrupt request is sent to the interrupt controller independently.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DMAC *
or DTC to perform data transfer. The TDRE flag is cleared to 0 automatically when data transfer is
performed by the DMAC * or DTC. The DMAC * and DTC cannot be activated by a TEI interrupt
request.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt can
activate the DMAC * or DTC to perform data transfer. The RDRF flag is cleared to 0
automatically when data transfer is performed by the DMAC * or DTC. The DMAC * and DTC
cannot be activated by an ERI interrupt request.
Also note that the DMAC * cannot be activated by an SCI channel 2 interrupt.
Note: * The DMAC is not supported in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 656 of 1268
REJ09B0220-0600
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