HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 213

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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6.5
6.5.1
When the chip is in advanced mode, external space areas 2 to 5 can be designated as DRAM
space, and DRAM interfacing performed. With the DRAM interface, DRAM can be directly
connected to the chip. A DRAM space of 2, 4, or 8 Mbytes can be set by means of bits RMTS2 to
RMTS0 in BCRH. Burst operation is also possible, using fast page mode.
6.5.2
Areas 2 to 5 are designated as DRAM space by setting bits RMTS2 to RMTS0 in BCRH. The
relation between the settings of bits RMTS2 to RMTS0 and DRAM space is shown in table 6.5.
Possible DRAM space settings are: one area (area 2), two areas (areas 2 and 3), and four areas
(areas 2 to 5).
Table 6.5
RMTS2
0
DRAM Interface (Not supported in the H8S/2321)
Overview
Setting DRAM Space
RMTS1
0
1
Settings of Bits RMTS2 to RMTS0 and Corresponding DRAM Spaces
RMTS0
1
0
1
Area 5
Normal space
Normal space
DRAM space
Area 4
Rev.6.00 Sep. 27, 2007 Page 183 of 1268
Area 3
DRAM space
Section 6 Bus Controller
REJ09B0220-0600
Area 2
DRAM space

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