HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 585

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HD6412320

Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. The NDR contents should not be altered during the interval from compare
match B to compare match A (the non-overlap margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DTC or DMAC * . Note, however, that the next
data must be written before the next compare match B occurs.
Figure 11.11 shows the timing of this operation.
Note: * The DMAC is not supported in the H8S/2321.
Compare match A
Compare match B
NDR
PODR
Figure 11.11 Non-Overlapping Operation and NDR Write Timing
0 output
Do not write
to NDR here
0/1 output
Write to NDR
Write to NDR
here
Section 11 Programmable Pulse Generator (PPG)
Rev.6.00 Sep. 27, 2007 Page 555 of 1268
0 output
Do not write
to NDR here
0/1 output
Write to NDR
Write to NDR
here
REJ09B0220-0600

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