MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 66

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

FLASH Memory
4.4.2 FLASH Block Protect Register
Advance Information
66
Address:
PGM — Program Control Bit
The FLASH Block Protect Register (FLBPR) is implemented as a byte
within the FLASH memory and therefore can only be written during a
FLASH programming sequence. The value in this register determines
the starting location of the protected range within the FLASH memory.
FLBPR[7:0] — Block Protect Register Bit7 to Bit0
Read:
Write:
Freescale Semiconductor, Inc.
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
These eight bits represent bits [14:7] of a 16-bit memory address. Bit-
15 is logic 1 and bits [6:0] are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. FLASH is protected from
this start address to the end of FLASH memory at $FFFF. With this
mechanism, the protect start address can be $XX00 and $XX80 (128
byte page boundaries) within the FLASH array.
Start address of FLASH block protect
For More Information On This Product,
1 = Program operation selected
0 = Program operation unselected
Figure 4-2. FLASH Block Protect Register (FLBPR)
$FF80
BPR7
Bit 7
Figure 4-3. FLASH Block Protect Start Address
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BPR6
FLASH Memory
6
BPR5
5
1
BPR4
4
FLBPR value
16-bit memory address
BPR3
3
68HC908AZ32A — Rev 0.0
BPR2
2
0 0 0 0 0 0 0
BPR1
1
MOTOROLA
BPR0
Bit 0