MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 297
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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18.9.2 TIMA Counter Registers
68HC908AZ32A — Rev 0.0
MOTOROLA
NOTE:
NOTE:
Setting the TSTOP and TRST bits simultaneously stops the TIMA
counter at a value of $0000.
PS[2:0] — Prescaler Select Bits
The two read-only TIMA counter registers contain the high and low bytes
of the value in the TIMA counter. Reading the high byte (TACNTH)
latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL
is read. Reset clears the TIMA counter registers. Setting the TIMA reset
bit (TRST) also clears the TIMA counter registers.
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL
by reading TACNTL before exiting the break interrupt. Otherwise,
TACNTL retains the value latched during the break.
Freescale Semiconductor, Inc.
These read/write bits select either the PTD6/ATD14/TCLK pin or one
of the seven prescaler outputs as the input to the TIMA counter as
Table 18-1
For More Information On This Product,
Timer Interface Module A (TIMA)
PS[2:0]
Go to: www.freescale.com
000
001
010
011
100
101
110
111
shows. Reset clears the PS[2:0] bits.
Table 18-1. Prescaler Selection
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock 1
TIMA Clock Source
PTD6/ATD14/TCLK
Timer Interface Module A (TIMA)
Advance Information
16
32
64
2
8
4
I/O Registers
297
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