MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 266
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Serial Peripheral Interface (SPI)
17.11 Low-Power Modes
17.11.1 Wait Mode
Advance Information
266
The following additional items are reset only by a system reset:
By not resetting the control bits when SPE is low, the user can clear SPE
between transmissions without having to reset all control bits when SPE
is set back to high for the next transmission.
By not resetting the SPRF, OVRF, and MODF flags, the user can still
service these interrupts after the SPI has been disabled. The user can
disable the SPI by writing 0 to the SPE bit. The SPI also can be disabled
by a mode fault occurring in an SPI that was configured as a master with
the MODFEN bit set.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
The SPI module remains active after the execution of a WAIT instruction.
In wait mode, the SPI module registers are not accessible by the CPU.
Any enabled CPU interrupt request from the SPI module can bring the
MCU out of wait mode.
Freescale Semiconductor, Inc.
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For More Information On This Product,
The SPTE flag is set.
Any transmission currently in progress is aborted.
The shift register is cleared.
The SPI state counter is cleared, making it ready for a new
complete transmission.
All the SPI port logic is defaulted back to being general-purpose
I/O.
All control bits in the SPCR register
All control bits in the SPSCR register (MODFEN, ERRIE, SPR1,
and SPR0)
The status flags SPRF, OVRF, and MODF
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
68HC908AZ32A — Rev 0.0
MOTOROLA
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