MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 118

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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System Integration Module (SIM)
7.4 Reset and System Initialization
7.4.1 External Pin Reset
Advance Information
118
The MCU has these reset sources:
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter (see
122), but an external reset does not. Each of the resets sets a
corresponding bit in the SIM reset status register (SRSR) (see
Registers
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 CGMXCLK cycles, assuming that neither the POR
nor the LVI was the source of the reset. See
7-4
Freescale Semiconductor, Inc.
shows the relative timing.
For More Information On This Product,
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
System Integration Module (SIM)
Reset Type
on page 132).
All others
POR/LVI
Go to: www.freescale.com
Table 7-3. PIN Bit Set Timing
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
67 (64 + 3)
Table 7-3
SIM Counter
68HC908AZ32A — Rev 0.0
for details.
on page
MOTOROLA
SIM
Figure

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