MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 339

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MC68HC908AZ32ACFU
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20.8 I/O Registers
20.8.1 TIM Status and Control Register
68HC908AZ32A — Rev 0.0
MOTOROLA
Address:
The following I/O registers control and monitor operation of the PIT:
The PIT status and control register:
POF — PIT Overflow Flag Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This read/write flag is set when the PIT counter resets to $0000 after
reaching the modulo value programmed in the PIT counter modulo
registers. Clear POF by reading the PIT status and control register
when POF is set and then writing a logic 0 to POF. If another PIT
overflow occurs before the clearing sequence is complete, then
For More Information On This Product,
PIT status and control register (PSC)
PIT counter registers (PCNTH–PCNTL)
PIT counter modulo registers (PMODH–PMODL)
Enables PIT interrupt
Flags PIT overflows
Stops the PIT counter
Resets the PIT counter
Prescales the PIT counter clock
Figure 20-3. PIT Status and Control Register (PSC)
$004B
POF
Bit 7
Programmable Interrupt Timer (PIT)
0
0
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= Unimplemented
POIE
6
0
PSTOP
5
1
PRST
4
0
0
Programmable Interrupt Timer (PIT)
3
0
0
PPS2
2
0
Advance Information
PPS1
1
0
I/O Registers
PPS0
Bit 0
0
339

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