MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 320
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Timer Interface Module B (TIMB)
19.4.4.2 Buffered PWM Signal Generation
19.4.4.3 PWM Initialization
Advance Information
320
NOTE:
Channels 0 and 1 can be linked to form a buffered PWM channel whose
output appears on the PTF4 pin. The TIMB channel registers of the
linked pair alternately control the pulse width of the output.
Setting the MS0B bit in TIMB channel 0 status and control register
(TBSC0) links channel 0 and channel 1. The TIMB channel 0 registers
initially control the pulse width on the PTF4 pin. Writing to the TIMB
channel 1 registers enables the TIMB channel 1 registers to
synchronously control the pulse width at the beginning of the next PWM
period. At each subsequent overflow, the TIMB channel registers (0 or
1) that control the pulse width are the ones written to last. TBSC0
controls and monitors the buffered PWM function, and TIMB channel 1
status and control register (TBSC1) is unused. While the MS0B bit is set,
the channel 1 pin, PTF5/TBCH1, is available as a general-purpose I/O
pin.
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
To ensure correct operation when generating unbuffered or buffered
PWM signals, use the following initialization procedure:
1. In the TIMB status and control register (TBSC):
2. In the TIMB counter modulo registers (TBMODH–TBMODL) write
3. In the TIMB channel x registers (TBCHxH–TBCHxL) write the
4. In TIMB channel x status and control register (TBSCx):
Freescale Semiconductor, Inc.
For More Information On This Product,
the value for the required PWM period.
value for the required pulse width.
a. Stop the TIMB counter by setting the TIMB stop bit, TSTOP.
b. Reset the TIMB counter and prescaler by setting the TIMB
Timer Interface Module B (TIMB)
reset bit, TRST.
Go to: www.freescale.com
68HC908AZ32A — Rev 0.0
MOTOROLA
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