MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 370

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
23.4.2 Data Direction Register B
Advance Information
370
NOTE:
Address:
ATD[7:0] — ADC Channels
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic 1 to a DDRB bit enables the output buffer for
the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 23-7
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
PTB7–PTB0 are eight of the analog-to-digital converter channels.
The ADC channel select bits, CH[4:0], determine whether the
PTB7–PTB0 pins are ADC channels or general-purpose I/O pins. If
an ADC channel is selected and a read of this corresponding bit in the
port B data register occurs, the data will be 0 if the data direction for
this bit is programmed as an input. Otherwise, the data will reflect the
value in the data latch. (See
Converter
affect the data direction of port B pins that are being used by the ADC.
However, the DDRB bits always determine whether reading port B
returns to the states of the latches or logic 0.
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
For More Information On This Product,
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
$0005
Bit 7
0
Figure 23-6. Data Direction Register B (DDRB)
shows the port B I/O logic.
Go to: www.freescale.com
(ADC-15)). Data direction register B (DDRB) does not
DDRB6
6
0
I/O Ports
DDRB5
5
0
Section 21. Analog-To-Digital
DDRB4
4
0
DDRB3
3
0
68HC908AZ32A — Rev 0.0
DDRB2
2
0
DDRB1
1
0
MOTOROLA
DDRB0
Bit 0
0