MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 191

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

13.5 COP Control Register
13.6 Interrupts
13.7 Monitor Mode
13.8 Low-Power Modes
13.8.1 Wait Mode
68HC908AZ32A — Rev 0.0
MOTOROLA
Address:
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
The COP does not generate CPU interrupt requests.
The COP is disabled in monitor mode when V
pin or on the RST pin.
The WAIT and STOP instructions put the MCU in low power-consump-
tion standby modes.
The COP remains active in wait mode. To prevent a COP reset during
wait mode, periodically clear the COP counter in a CPU interrupt routine.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
$FFFF
Computer Operating Properly (COP)
Bit 7
Figure 13-2. COP Control Register (COPCTL)
Go to: www.freescale.com
6
5
Low Byte of Reset Vector
Unaffected by Reset
Clear COP Counter
4
Computer Operating Properly (COP)
3
Hi
is present on the IRQ1
2
COP Control Register
Advance Information
1
Bit 0
191