MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 134

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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System Integration Module (SIM)
7.8.3 SIM Break Flag Control Register
Advance Information
134
Address:
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
LVI — Low-Voltage Inhibit Reset Bit
The SIM break control register contains a bit that enables software to
clear status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
For More Information On This Product,
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
1 = Status bits clearable during break
0 = Status bits not clearable during break
Figure 7-19. SIM Break Flag Control Register (SBFCR)
$FE03
BCFE
Bit 7
R
0
System Integration Module (SIM)
Go to: www.freescale.com
R
6
= Reserved
R
5
R
4
R
3
68HC908AZ32A — Rev 0.0
R
2
R
1
0
MOTOROLA
Bit 0
R

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