MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 124

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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System Integration Module (SIM)
7.6.1 Interrupts
Advance Information
124
INTERRUPT
MODULE
I BIT
R/W
IAB
IDB
DUMMY
DUMMY
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
7-10
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared), see
7-9.
SP
PC – 1[7:0]
Freescale Semiconductor, Inc.
For More Information On This Product,
shows interrupt recovery timing.
SP – 1
Figure 7-8
System Integration Module (SIM)
PC – 1[15:8]
Go to: www.freescale.com
SP – 2
X
.
SP – 3
Interrupt Entry
Figure 7-8
A
SP – 4
CCR
shows interrupt entry timing.
VECT H
V DATA H
VECT L
V DATA L
68HC908AZ32A — Rev 0.0
START ADDR
OPCODE
MOTOROLA
Figure
Figure

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