MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 288
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Timer Interface Module A (TIMA)
18.4.4.1 Unbuffered PWM Signal Generation
Advance Information
288
The value in the TIMA counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMA counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is $000 (see
The value in the TIMA channel registers determines the pulse width of
the PWM output. The pulse width of an 8-bit PWM signal is variable in
256 increments. Writing $0080 (128) to the TIMA channel registers
produces a duty cycle of 128/256 or 50%.
Any output compare channel can generate unbuffered PWM pulses as
described in
are unbuffered because changing the pulse width requires writing the
new pulse width value over the value currently in the TIMA channel
registers.
An unsynchronized write to the TIMA channel registers to change a
pulse width value could cause incorrect operation for up to two PWM
periods. For example, writing a new value before the counter reaches
the old value but after the counter reaches the new value prevents any
compare during that PWM period. Also, using a TIMA overflow interrupt
routine to write a new, smaller pulse width value may cause the compare
PTEx/TCHx
Freescale Semiconductor, Inc.
For More Information On This Product,
OVERFLOW
Timer Interface Module A (TIMA)
Go to: www.freescale.com
Pulse Width Modulation (PWM)
Figure 18-3. PWM Period and Pulse Width
PULSE
WIDTH
TIMA Status and Control Register
PERIOD
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
on page 287. The pulses
68HC908AZ32A — Rev 0.0
OVERFLOW
on page 295).
MOTOROLA
COMPARE
OUTPUT
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