MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 132
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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System Integration Module (SIM)
7.8 SIM Registers
7.8.1 SIM Break Status Register
Advance Information
132
;
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the
break service routine software.
HIBYTE
LOBYTE
EQU
EQU
If not BW, do RTI
BRCLR
Address:
The SIM has three memory mapped registers.
The SIM break status register contains a flag to indicate that a break
caused an exit from wait mode.
BW — SIM Break Wait
BW can be read within the break state SWI routine. The user can modify
the return address on the stack by subtracting one from it. The following
code is an example of this. Writing zero to the BW bit clears it.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This status bit is useful in applications requiring a return to wait mode
after exiting from a break interrupt. Clear BW by writing a logic 0 to it.
Reset clears BW.
5
6
BW,SBSR, RETURN
For More Information On This Product,
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
$FE00
Bit 7
R
R
Figure 7-17. SIM Break Status Register (SBSR)
System Integration Module (SIM)
Go to: www.freescale.com
R
6
= Reserved
;
;
See if wait mode was exited by break.
R
5
R
4
R
3
NOTE: Writing a logic 0 clears BW
68HC908AZ32A — Rev 0.0
R
2
See Note
BW
1
0
MOTOROLA
Bit 0
R
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