MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 164

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Configuration Register (CONFIG-1)
Advance Information
164
NOTE:
Address:
for at least nine consecutive CPU cycles. Once an LVI reset occurs, the
MCU remains in reset until V
LVISTOP — LVI Stop Mode Enable Bit
To have the LVI enabled in stop mode, the LVIPWR must be at a logic 1
and the LVISTOP bit must be at a logic 1. Take note that by enabling the
LVI in stop mode, the stop I
LVIRST — LVI Reset Enable Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
LVISTOP enables the LVI module in stop mode. (See
Low Voltage Inhibit
LVIRST enables the reset signal from the LVI module. (See
14. Low Voltage Inhibit
For More Information On This Product,
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets enabled
0 = LVI module resets disabled
LVISTOP
$001F
Bit 7
Configuration Register (CONFIG-1)
R
0
Figure 9-1. Configuration Register (CONFIG-1)
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= Reserved
R
6
1
LVIRST
(LVI)).
5
1
DD
(LVI)).
DD
current will be higher.
LVIPWR
rises to a voltage, LVI
4
1
SSREC
3
0
68HC908AZ32A — Rev 0.0
COPRS
2
0
TRIPR
Section 14.
STOP
1
0
.
MOTOROLA
Section
COPD
Bit 0
0