MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 337

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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20.5 PIT Counter Prescaler
20.6 Low-Power Modes
68HC908AZ32A — Rev 0.0
MOTOROLA
PIT Counter Modulo Register High
PIT Counter Modulo Register Low
Register Name
(PMODH)
(PMODL)
Table 20-1. PIT I/O Register Address Summary
Register
Address
The clock source can be one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PPS[2:0], in the status and control register select
the PIT clock source.
The value in the PIT counter modulo registers and the selected prescaler
output determines the frequency of the periodic interrupt. The PIT
overflow flag (POF) is set when the PIT counter value rolls over to $0000
after matching the value in the PIT counter modulo registers. The PIT
interrupt enable bit, POIE, enables PIT overflow CPU interrupt requests.
POF and POIE are in the PIT status and control register.
The WAIT and STOP instructions put the MCU in low power-consump-
tion standby modes.
Reset:
Reset:
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
Figure 20-2. PIT I/O Register Summary
For More Information On This Product,
Bit 7
Bit 15
Bit 7
Programmable Interrupt Timer (PIT)
$004B
1
1
PSC
Go to: www.freescale.com
=Unimplemented
PCNTH
14
6
$004C
1
6
1
13
PCNTL
5
$004D
1
5
1
PMODH
12
4
$004E
1
4
1
Programmable Interrupt Timer (PIT)
PMODL
11
3
1
3
1
$004F
10
2
1
2
1
PIT Counter Prescaler
Advance Information
1
9
1
1
1
Bit 0
Bit 8
Bit 0
1
1
337

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