MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 273

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

68HC908AZ32A — Rev 0.0
MOTOROLA
Freescale Semiconductor, Inc.
CPHA bits. When CPHA = 0, the SS pin of the slave SPI module must
be set to logic 1 between bytes. (See
CPHA bit.
When CPHA = 0 for a slave, the falling edge of SS indicates the
beginning of the transmission. This causes the SPI to leave its idle
state and begin driving the MISO pin with the MSB of its data. Once
the transmission begins, no new data is allowed into the shift register
from the data register. Therefore, the slave data register must be
loaded with the desired transmit data before the falling edge of SS.
Any data written after the falling edge is stored in the data register and
transferred to the shift register at the current transmission.
When CPHA = 1 for a slave, the first edge of the SPSCK indicates the
beginning of the transmission. The same applies when SS is high for
a slave. The MISO pin is held in a high-impedance state, and the
incoming SPSCK is ignored. In certain cases, it may also cause the
MODF flag to be set. (See
on the SS pin does not in any way affect the state of the SPI state
machine.
For More Information On This Product,
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
Mode Fault Error
Figure
Serial Peripheral Interface (SPI)
17-10). Reset sets the
on page 261). A logic 1
Advance Information
I/O Registers
273