MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 148
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Clock Generator Module (CGM)
8.5.4 Analog Power Pin (V
8.5.5 Oscillator Enable Signal (SIMOSCEN)
8.5.6 Crystal Output Frequency Signal (CGMXCLK)
8.5.7 CGM Base Clock Output (CGMOUT)
8.5.8 CGM CPU Interrupt (CGMINT)
8.6 CGM Registers
Advance Information
148
NOTE:
V
V
Route V
capacitors as close as possible to the package.
The SIMOSCEN signal enables the oscillator and PLL.
CGMXCLK is the crystal oscillator output signal. It runs at the full speed
of the crystal (f
circuit.
and OSC2 and may not represent the actual circuitry. The duty cycle of
CGMXCLK is unknown and may depend on the crystal and other
external factors. Also, the frequency and amplitude of CGMXCLK can be
unstable at startup.
CGMOUT is the clock output of the CGM. This signal is used to generate
the MCU clocks. CGMOUT is a 50% duty cycle clock running at twice the
bus frequency. CGMOUT is software programmable to be either the
oscillator output, CGMXCLK, divided by two or the VCO clock,
CGMVCLK, divided by two.
CGMINT is the CPU interrupt signal generated by the PLL lock detector.
Three registers control and monitor operation of the CGM:
DDA
DDA
Freescale Semiconductor, Inc.
DDA
For More Information On This Product,
is a power pin used by the analog portions of the PLL. Connect the
pin to the same voltage potential as the V
Figure 8-3
DDA
)
Clock Generator Module (CGM)
Go to: www.freescale.com
carefully for maximum noise immunity and place bypass
CGMXCLK
shows only the logical relation of CGMXCLK to OSC1
) and comes directly from the crystal oscillator
DD
68HC908AZ32A — Rev 0.0
pin.
MOTOROLA
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