MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 149

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.6.1 PLL Control Register
68HC908AZ32A — Rev 0.0
MOTOROLA
Address:
The PLL control register contains the interrupt enable and flag bits, the
on/off switch, and the base clock selector bit.
PLLIE — PLL Interrupt Enable Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
•
•
•
This read/write bit enables the PLL to generate a CPU interrupt
request when the LOCK bit toggles, setting the PLL flag, PLLF. When
the AUTO bit in the PLL bandwidth control register (PBWC) is clear,
PLLIE cannot be written and reads as logic 0. Reset clears the PLLIE
bit.
For More Information On This Product,
1 = PLL CPU interrupt requests enabled
0 = PLL CPU interrupt requests disabled
PLL control register (PCTL)
PLL bandwidth control register (PBWC)
PLL programming register (PPG)
$001C
PLLIE
Bit 7
0
Clock Generator Module (CGM)
Go to: www.freescale.com
Figure 8-4. PLL Control Register (PCTL)
= Unimplemented
PLLF
6
0
PLLON
5
1
BCS
4
0
3
1
1
Clock Generator Module (CGM)
2
1
1
Advance Information
CGM Registers
1
1
1
Bit 0
1
1
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