MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 165

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

68HC908AZ32A — Rev 0.0
MOTOROLA
NOTE:
LVIPWR — LVI Power Enable Bit
SSREC — Short Stop Recovery Bit
If using an external crystal oscillator, do not set the SSREC bit.
COPRS — COP Rate Select Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Extra care should be exercised when using this emulation part for
development of code to be run in ROM AZ or AB parts that the
options selected by setting the CONFIG-1 register match exactly
the options selected on any ROM code request submitted. The
enable/disable logic is not necessarily identical in all parts of the
AZ and AB families. If in doubt, check with your local field
applications representative.
Freescale Semiconductor, Inc.
LVIPWR enables the LVI module. (See
Inhibit
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay. (See
Stop Mode
COPRS enables the shorter COP timeout period. (See
Computer Operating Properly
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
For More Information On This Product,
1 = LVI module power enabled
0 = LVI module power disabled
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
1 = COP timeout period is 2
0 = COP timeout period is 2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Configuration Register (CONFIG-1)
(LVI)).
Go to: www.freescale.com
on page 130).
(COP)).
13
18
(COP)).
– 2
– 2
4
4
CGMXCLK cycles
CGMXCLK cycles
Configuration Register (CONFIG-1)
Section 13. Computer
Section 14. Low Voltage
Functional Description
Advance Information
Section 13.
165