MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 130
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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System Integration Module (SIM)
7.7.2 Stop Mode
Advance Information
130
NOTE:
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and
CGMXCLK) in stop mode, stopping the CPU and peripherals. Stop
recovery time is selectable using the SSREC bit in the configuration
register (CONFIG-1). If SSREC is set, stop recovery is reduced from the
normal delay of 4096 CGMXCLK cycles down to 32. This is ideal for
applications using canned oscillators that do not require long startup
times from stop mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
The break module is inactive in Stop mode. The STOP instruction does
not affect break module register states.
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
CGMXCLK
Freescale Semiconductor, Inc.
For More Information On This Product,
RST
IDB
IAB
System Integration Module (SIM)
$A6
Figure 7-14. Wait Recovery from Internal Reset
Go to: www.freescale.com
$6E0B
$A6
Figure 7-15
$A6
Cycles
shows stop mode entry timing.
32
Cycles
32
68HC908AZ32A — Rev 0.0
RST VCT H
RST VCT L
MOTOROLA
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