h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 928

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Appendix B Internal I/O Registers
STR3—Status Register 3
Rev. 3.00 Jan 18, 2006 page 900 of 1044
REJ09B0280-0300
Bit
Initial value
Slave Read/Write
Host Read/Write
Note: * Only 0 can be written, to clear the flag.
Two-way register input data full
0
1
[Clearing condition]
Slave reads TWR15
[Setting condition]
Host writes to TWR15 using I/O write cycle
IBF3B
R
R
7
0
Two-way register output data full
0
1
[Clearing condition]
Host reads TWR15 using I/O read cycle, or slave writes 0 to OBF3B bit
[Setting condition]
Slave writes to TWR15
OBF3B
R/(W) *
R
6
0
Master write mode flag
0
1
Slave write mode flag
[Clearing condition]
Slave reads TWR15
[Setting condition]
Host writes to TWR0 using I/O write cycle when SWMF = 0
0
1
MWMF
[Clearing condition]
Host reads TWR15 using I/O read cycle, or slave writes 0 to SWMF bit
[Setting condition]
Slave writes to TWR0 when MWMF = 0
R
R
5
0
R/(W) *
SWMF
R
4
0
Command/data
0
1
User-defined bit
H'FE32
Input data register (IDR) contents are data
Input data register (IDR) contents are a command
C/D3
Input data register full
R
R
3
0
0
1
[Clearing condition]
Slave reads IDR
[Setting condition]
Host writes to IDR using I/O write cycle
DBU32
R/W
R
2
0
Output data register full
0
1
[Clearing condition]
Host reads ODR using
I/O read cycle, or slave
writes 0 to OBF bit
[Setting condition]
Slave writes to ODR
IBF3A
R
R
1
0
HIF (LPC)
OBF3A
R/(W)*
R
0
0